1. Field of the Invention
The present invention relates to a structure for use in testing electronic components in a substrate. Moreover, the present invention relates to a substrate including one or more sensing structures and a testing equipment for testing electronic components on a substrate.
2. Discussion of the Related Art
Thanks to the advance in the field of manufacturing processes of electronic integrated circuits, electrical components have become smaller, thereby allowing manufacturing substrates including a large number of integrated circuits. Moreover, it is possible to fabricate compact electronic circuits including a large number of components. Consequently, the density of connection terminals for connecting the integrated electronic circuits with other electronic systems has also drastically increased.
After being formed in the substrate, called a wafer, the integrated circuits need to be tested so as to eventually remove faulty components or repair them if this is possible. The functionality of each integrated circuit included in the substrate is verified by means of suitable probes that contact the connection terminals or pads of the integrated circuit to be tested, in technical language called DUT (Device Under Test). More precisely, during the testing process, an automated testing equipment ATE or tester is electrically connected to the wafer on which the electronic components are formed. The interface between the ATE and the wafer is a card of probes, generally called a probe card, including several probes adapted to simultaneously contact the pads of the DUT integrated circuits performing the so-called probing action of the probes on the pads. Said testing procedures of electronic integrated circuits are commonly performed, for example, during electrical test on the wafer, called in technical language Electrical Wafer Sort (EWS), or for a reliability test on wafer, called in the art Wafer Level Burn-in (WLBI).
Since the DUT to be tested includes a very large number of pads close to each other, the probability that the tip of the probe contacts the region surrounding the pad becomes higher. Consequently the probability of damaging the passivation surrounding the pad, due to improperly performed probing, becomes higher.
In order to avoid damaging the pads and breakage of the passivation, it is therefore crucial to correctly align the tips of the probes of the probe card with corresponding pads in the testing phase of the DUT integrated circuits.
The correct alignment of a probe card with respect to corresponding pads can be electrically performed by using suitable dummy (fictitious) structures formed on the substrate. Examples of said dummy structures or dummy pads are shown in FIGS. 34 and 35. In particular, FIG. 34 illustrates a pad 10 including a first non-conductive region 12, which would be used for the probing in a common conductive pad, surrounded by a conducting region 11 for sensing. A sensing circuit 13 is connected between the conducting sensing region 11 and a ground electrode. The sensing circuit 13 may be a diode, a resistor or the like. The dimensions of the non-conducting region 12 substantially correspond to the dimensions of the connection terminal or pad of the integrated circuit to be tested. In order to verify alignment, the probe tip contacts the dummy pads and a current is forced/absorbed by means of the tip. If the tip contacts said first non-conductive region 12, no current will flow through the pad, and the circuit will be open. On the contrary, if the probe tip contacts said conducting sensing region 11, a current will flow through the pad and a suitable voltage will be detected across the sensing circuit 13, thereby indicating that the probes of the probe card are not correctly aligned with the pads. Several configurations of the dummy pad of FIG. 34 are described in U.S. Pat. No. 7,616,020.
FIG. 35 illustrates a further realization of a dummy pad 20 according to the prior art. The dummy pad 20 includes a probing area 22 for contacting the tip of the probe surrounded by a plurality of conductive sensing regions 21 electrically isolated from each other. Each conductive sensing region 21 is connected to a ground electrode through a sensing circuit 23, 24, 25, 26. Sensing circuits 23, 24, 25, 26 connected to different conducting sensing regions 21 may be diodes of a different area so as to have a different resistance or may be formed by a different number of identical diodes connected in parallel to the sensing region and a ground electrode or ground terminal. As previously described, a current is forced from the probe in order to determine the position of the probe, which, if connected to a conducting sensing region 21, will be connected to a particular sensing circuit 23, 24, 25, 26 in turn connected to a corresponding conducting sensing region 21. Since sensing circuits connected to different conducting sensing regions have different resistances, it is possible to determine which conducting sensing region is being connected to the probe, thereby indicating the drift direction of the probe. The sensing circuits may include diodes of different areas as well as resistors or transistors. Several configurations of the dummy pad depicted in FIG. 35 are described U.S. Pat. No. 7,612,573.
However, the dummy pad 10 illustrated in FIG. 34 only allows detecting whether the probe contacts the sensing structures within or outside the probing area but does not allow determining the drift direction of the probe.
Further, although the dummy pad 20 of FIG. 35 allows determining the drift direction of a probe, the position of the probe is determined by using either a different diode for each sensing region or a different number of identical diodes connected in parallel. Accordingly, the voltage difference measurable between the sensing regions is rather small. More precisely, if the sensing circuits are formed by diodes, said voltage difference lies between 50 mV and 100 mV, which is much less than the threshold voltage of the diode forming the sensing circuit.
However, in the testing process, it often occurs that the probe tip does not contact the corresponding connection terminal perfectly, due, for instance, to oxidation of the tip itself or to imperfections of the pad. This increases the contact resistance between the probe and the connection terminal, thereby causing a variation in the value of measured electrical parameter. This behavior is illustrated in the histograms of FIGS. 36 and 37. In particular, FIG. 36 shows voltage values measured in a case where the probe tip perfectly contacts a pad with a characteristic identical to those of a generic sensing region. On the other hand, if the measuring conditions are not optimal, a significant percentage of measurements will provide a voltage value which can vary by 300 mV and even more from the value measured in optimal/ideal conditions.
Consequently, the structures described in the cited prior art documents are either not capable of determining the drift direction of the probe or will fail to correctly determine the position of the probe in a significant number of measurements.
Moreover, since sensing circuits of different sensing regions are connected in parallel, if the probe tip contacts two neighboring sensing regions, the current will flow through both sensing circuits and the voltage drop that will be measured across both sensing circuits will make it impossible to even approximately determine which sensing region the probe is contacting.
Finally, sensing circuits including integrated resistors may not be accurate since the value of a resistor generally varies, in absolute terms, even more than 25% from the desired value, due for instance to the unevenness of the process parameters in a manner which is known to the skilled persons. In addition, integrated resistors may be quite bulky thereby causing the sensing circuits to occupy a large area in the substrate and increasing costs.